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   comp.os.ms-windows.advocacy      Putting Bill Gates on a giant pedestal      5,618 messages   

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   Message 4,642 of 5,618   
   KP2 KP2 to Peter Mayne   
   Re: Tidbits 02/19/93   
   26 Nov 23 18:14:38   
   
   From: jungletrain@outlook.com   
      
   On Tuesday, February 23, 1993 at 6:12:17 PM UTC-8, Peter Mayne wrote:   
   > In article <7001...@otter.hpl.hp.com>, s...@otter.hpl.hp.com (Steve   
   Loughran) writes:   
   > >> >I wonder if this is the first time hardware has been designed to   
   > >> >fit the OS?   
   > >   
   > >> Actually, it isn't.   
   > >   
   > >> VAX/VMS   
   > >> OS/400 -> AS/400   
   > >> SPARC for UNIX (and most RISC CPUs, for that matter)    
   > >> 8086 (for some kind of CP/M compatibility)   
   > >> The CRISP processor specifically designed for C (see a recent Byte)   
   > >   
   > >Peter is right in that RISC CPUs are normally optimised for the code which   
   > >is to be run on it, and given the amnout of CPU time the OS invariably    
   > >consumes that the OS must be used to determine which instructions   
   > >to provide[*] .Also things like memory protection models ought to match,   
   > >otherwise you get CPU designers coming up with bizarre segmented memory   
   > >architechtures when all us hackers want is a flat memory model ;-)   
   > >   
   > >>(but not Alpha 8->)   
   > >   
   > >You mean no-one had a look at the instruction usage of any unix before   
   > >designing the architecture? Surely they didnt just use VMS.   
   > The designers looked at application instruction usage. OS specific stuff   
   > can be (and is) implemented in PALcode. Thus, OSF/1 isn't burdened by   
   > OpenVMS features, Windows NT isn't burdened by OSF/1 features, etc, etc.   
   > >Oh yeah. MIPS processirs have had two endian modes for a long time.   
   Something   
   > >to do with VaxStations I believe.   
   > Only in the sense that DEC's MIPS chips ends are at the same end as VAXen   
   ends.   
   > > Steve   
   > >[*] cynics may argue that in fact most modern RISC CPUS are optimised purely   
   > >for impressive benchmark figures.   
   > A tempting argument... ;-)   
   > PJDM   
   > --   
   > Peter Mayne | My statements, not Digital's.   
   > Digital Equipment Corporation |   
   > Canberra, ACT, Australia | "AXP!": Bill the Cat   
   a   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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