From: cross@spitfire.i.gajendra.net   
      
   In article <10af7c4$3ae3g$1@dont-email.me>,   
   David Wade   wrote:   
   >On 17/09/2025 21:23, Dan Cross wrote:   
   >> In article <10aekoc$3a62f$1@dont-email.me>,   
   >> David Wade   wrote:   
   >>> On 17/09/2025 12:52, Dan Cross wrote:   
   >>>> In article <10ae172$33ukj$1@dont-email.me>,   
   >>>> David Wade   wrote:   
   >>>>> On 17/09/2025 07:08, Lawrence D’Oliveiro wrote:   
   >>>>>> On Wed, 17 Sep 2025 00:25:32 +0100, David Wade wrote:   
   >>>>>>   
   >>>>>>> Its interesting you say "modern virtualisation" because most of the   
   >>>>>    
   >>>>   
   >>>> I'm not sure about the specifics here, which is not to say that   
   >>>> I don't believe you, but I'd love to see a source.  370 is known   
   >>>> to meet the P&G requirements, and XA extended the architecture   
   >>>> with some new features for supporting virtual machines; do you   
   >>>> recall what they added that _violated_ the P&G requirements?   
   >>>   
   >>> It is the same issue that differentiates a 68000 and the 68010 and which   
   >>> prevented the VAX having a hypervisor without microcode changes...   
   >>   
   >> Or the inverse?  The issue with the 68000 was that it noted the   
   >> processor privilege mode, interrupt level, and debugging trace   
   >> control in the status register, and reading that register was   
   >> unprivileged.  The 68010 simply made the instruction reading the   
   >> entire SR privileged, and added an unprivileged instruction to   
   >> read just the condition codes.   
   >>   
   >> Sounds like IBM took an already clasically virtualizable machine   
   >> and made it not so for efficiency reasons, adding in new   
   >> sensitive and yet unprivileged instructions, but also a   
   >> compatibility hack via microcode and a new instruction to switch   
   >> to that?   
   >   
   >I think its to do with switching between 24 and 31 bit addressing...   
   >.. SIE or Start Interpretive Execution creates a virtual environment   
   >that the microcode manages.   
      
   _nod_ makes sense.   
      
   >As I am sure you know many of the earlier 370 class machines had similar   
   >facilities in that ECPS:VM implemented some of the functions normally   
   >carried out in the Hypervisor in the CPU microcode. I found this free to   
   >download  paper on it :-   
   >   
   >https://dl.acm.org/doi/abs/10.1145/1096532.1096534   
   >   
   >in many ways SIE is an extension of these assists...   
      
   Ooo, that's very interesting.  Thanks for the reference!   
      
   	- Dan C.   
      
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