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   comp.os.vms      DEC's VAX* line of computers & VMS.      264,096 messages   

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   Message 263,386 of 264,096   
   =?UTF-8?Q?Arne_Vajh=C3=B8j?= to All   
   Re: VMS previous DEC/CPQ/HP[E] decisions   
   20 Sep 25 20:09:53   
   
   From: arne@vajhoej.dk   
      
   On 9/20/2025 7:40 PM, Lawrence D’Oliveiro wrote:   
   > On Sat, 20 Sep 2025 21:13 +0100 (BST), John Dallman wrote:   
   >   
   >> ... the IBM Z instruction set only has three instruction lengths -   
   >> 2, 4 and 6 bytes, which has not changed since System/360 - and you   
   >> can always discover the length of each instruction from its first   
   >> two bytes. That makes having multiple instructions being decoded   
   >> simultaneously easier, which is a bottleneck in x86 and x86-64, the   
   >> other long-lasting CISC instruction set.   
   >   
   > Mainframes were never designed for high CPU performance.   
   >   
   > Look at the current Top500 list of the world’s fastest machines; what   
   > architectures do you see? IBM POWER offers a few contenders; also ARM,   
   > I think MIPS, and of course the most common is x86-64. At some point   
   > no doubt a RISC-V machine is likely to make an appearance.   
   >   
   > No IBM Z. Not before, not now, not ever.   
      
   Not now.   
      
   But once upon a time.   
      
   IBM 3090 with integrated vector facility and the   
   equivalent and compatible Amdahl vector.   
      
   Arne   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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