From: cross@spitfire.i.gajendra.net   
      
   In article <68e1da98$0$677$14726298@news.sunsite.dk>,   
   Arne Vajhøj   wrote:   
   >On 10/4/2025 10:14 PM, Dan Cross wrote:   
   >> In article <68dfc38f$0$673$14726298@news.sunsite.dk>,   
   >> Arne Vajhøj   wrote:   
   >>> On 10/3/2025 8:12 AM, Simon Clubley wrote:   
   >>>> On 2025-10-02, Dan Cross  wrote:   
   >>>>> In article ,   
   >>>>> David Goodwin   wrote:   
   >>>>>> Set top boxes and routers were not the target market for Windows in the   
   >>>>>> 90s, and they are clearly not a market Microsoft is interested in   
   >>>>>> pursuing today.   
   >>>>>   
   >>>>> Moreover, 99.9% of those MIPS CPUs that are outselling x86 are   
   >>>>> embedded microcontrollers that just happen to use the MIPS   
   >>>>> instruction set.  If they run any OS at all, it's way more than   
   >>>>> likely to be some kind of RTOS.   
   >>>>   
   >>>> Here is one example at the lower end (which is also available in hobbyist   
   >>>> friendly packaging):   
   >>>>   
   >>>> https://uk.farnell.com/microchip/pic32mx250f128b-i-sp/mcu-3   
   bit-pic32-40mhz-spdip-28/dp/2097773   
   >>>   
   >>> I think this part of the spec illustrate the target market:   
   >>>   
   >>>    
   >>> MIPS32® M4K® core with MIPS16e® mode for up to 40% smaller code size   
   >>>    
   >>>   
   >>> Switching to 16 bit mode to reduce application size is not where   
   >>> Microsoft is with Windows today.   
   >>   
   >> a) MSFT isn't running Windows on that core, but Linux isn't   
   >> running on it, either.   
   >>   
   >> b) MIPS16e is to MIPS 32 as Thumb or Thumb-2 is to ARM, or as   
   >> the RISC-V compressed ISA is to RISC-V.   
   >>   
   >> c) Windows on ARM does use Thumb-2:   
   >> https://devblogs.microsoft.com/oldnewthing/20210531-00/?p=105265   
   >   
   >So MIPS16e is not 16 bit in traditional sense (16 bit registers,   
   >16 bit address space etc.) but just shorter instructions (16 bit)?   
      
   Correct.  It's just a denser encoding, using 16-bits for an   
   instruction instead of the 32-bits of standard MIPS.  For   
   embedded applications, which usually use Harvard architectures   
   but have limited flash or other space for program text (and even   
   smaller amounts of SRAM for data), this can be a big win.   
      
   The tradeoff is some limitations versus the standard 32-bit   
   encoding: for example, it can only address 8 registers instead   
   of the full register file, and immediate displacements/values   
   are smaller, since there are fewer bits in which to encode them.   
   But the address space is not limited to 16 bits or anything like   
   that, and registers remain their normal size.  In this sense, it   
   is wholy unlike x86's real mode, for example.  A compiler can   
   freely emit the two variants in the same code stream, and the   
   processor can switch between them on a jump or branch   
   instruction.   
      
   	- Dan C.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)