home bbs files messages ]

Forums before death by AOL, social media and spammers... "We can't have nice things"

   comp.sys.apple2      Discussion about Apple II micros      56,720 messages   

[   << oldest   |   < older   |   list   |   newer >   |   newest >>   ]

   Message 55,751 of 56,720   
   Kent Dickey to anthonypaulo@gmail.com   
   Re: Phase 0 ghosting/jitter - is this re   
   01 Sep 22 04:41:54   
   
   From: kegs@provalid.com   
      
   In article <25814600-6c5b-4bad-a427-5c437d501cafn@googlegroups.com>,   
   Anthony Ortiz   wrote:   
   >> I looked briefly at the 1x. You have a lot of ringing. First, some ringing   
   >> is fine, if that's the way the circuit is designed. Old NMOS/CMOS stuff   
   >> is not trying to balance driver and receiver impedence, so I would expect   
   >> things to not look "perfect". If there is real ringing, it's only a problem   
   >> if the amplitude is so much that it causes the receiver to misread the   
   >> signal (so, a clock ringing so much that it could be intereted as a new   
   >> edge is a problem). As I explain to many people--some ringing is usually   
   >> fine, it needs to be severe to be a problem.   
      
   [snip]   
      
   >> It's ok to probe "badly" if it's easy, or that it's not worth the   
   >> trouble to probe properly. Try to look at the signals as "digital", and   
   >> ignore kinks, ringing, etc.   
   >>   
   >> Kent   
   >   
   >Hi Kent! Thank you so much for responding, this is a great explanation   
   >of what I've been doing wrong. I'll do what you suggested and see what   
   >it looks like. I figured the problem was likely to be me, and thanks to   
   >you I'll be able to make a more informed test from now on.   
      
   I just wanted to reemphasize that the Apple II is very noisy, and I   
   would expect most signals to not look all that great.  There's a reason   
   it's clocked at 1MHz.  Ringing is generally not a problem at all on data   
   signals as long as it's not happening near clock edges.  And the clock   
   will look bad since it's not really buffered and driven well--but it's   
   OK since all the timing requirements take into account that it doesn't   
   look good.  The clock can ring, as long as the amplitude doesn't get   
   close to crossing Vih/Vil thresholds as it rings.  It's kind of surprising   
   how bad signals can get before its a problem.   
      
   Some circuits are designed to have bad looking signal integrity--especially   
   if they are at relatively low speed.  It's cheaper and works fine.   
   Signals ring when the driver is too strong for the capacitance load, and   
   TTL drives relatively strongly.   
      
   Kent   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

[   << oldest   |   < older   |   list   |   newer >   |   newest >>   ]


(c) 1994,  bbs@darkrealms.ca