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   comp.sys.apple2      Discussion about Apple II micros      56,720 messages   

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   Message 56,578 of 56,720   
   Kent Dickey to dog_cow@macgui.com   
   Re: How does the Apple IIGS emulate a =?   
   20 Feb 24 16:55:45   
   
   From: kegs@provalid.com   
      
   In article ,   
   D Finnigan   wrote:   
   >Kent Dickey wrote:   
   >> In article ,   
   >> D Finnigan   wrote:   
   [snip]   
   >>>In previous Apple II designs, the re­freshing of memory was tied directly   
   >>>to   
   >>>the Apple II video mode. The Mega II includes an 8-bit counter for   
   >>>refresh­ing the 128K bytes of (slow) memory associated with the Apple   
   >>>IIe/IIc model; it does five cycles of RAM refresh during the horizontal   
   >>>retrace of each video scan line and refreshes the 128K bytes of memory in   
   >>>3.25 milliseconds. By taking care of RAM refresh the Mega II chip opens   
   >>>the   
   >>>Apple II design to new video modes that were impossible before.   
   >>   
   >> I don't know the source of the above paragraph and what it's trying to   
   >> say,   
   >> but I do not believe it is correct.   
   >   
   >The source is the October 1986 BYTE Magazine article by Gregg Williams,   
   >senior technical editor at BYTE.   
   >   
   >It's on page 86 of the issue of BYTE magazine dated October 1986.   
   >   
   >   
   >--   
   >]DF$   
   >The New Apple II User's Guide:   
   >https://macgui.com/newa2guide/   
      
   Sorry, I didn't mean to imply I doubted that BYTE magazine published those   
   statements in 1986.  I meant I'm not sure what his source was, but I believe   
   he is mistaken.  He seems to have fumbled up the SHR being able to read   
   the SCB (one cycle) and palette data (read in 4 cycles) during HBL with a   
   change to how refresh works.   
      
   Kent   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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