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   comp.sys.raspberry-pi      Raspberry Pi computers & related hardwar      26,127 messages   

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   Message 24,229 of 26,127   
   Theo to Andrew Smallshaw   
   Re: Port forwarding from RPi to Windows    
   14 Feb 24 22:37:37   
   
   From: theom+news@chiark.greenend.org.uk   
      
   Andrew Smallshaw  wrote:   
   > The primary design objectives were a low per-unit cost (not design   
   > cost as sometimes stated) and a minimum of glue logic between major   
   > subsystems.  I recall seeing a "triangle" diagram with the corners   
   > cut off, the centre of the triangle was the CPU, the corners were   
   > memory controller, graphics, and peripheral bus.   
   >   
   > You're correct to identify a plastic package as a design criteria,   
   > from memory the target was £2/chip which implied that over a ceramic   
   > one.  None of the group had any chip design experience, they knew   
   > a plastic package meant no more than a 1-2W power dissipation, but   
   > had no idea what that meant in terms of design.  Thus they optimised   
   > for power at every opportunity and undercut the target by orders   
   > of magnitude.   
   >   
   > The other dimension to lowering the cost of the package was reducing   
   > pin out to the bare minimum, hence the 24 bit (not 32 bit) address   
   > bus.  Size of the wafer was an irrelevance since they never baked   
   > their own chips, die size yes they wanted to keep small to lower   
   > cost but not an over-riding consideration - it wasn't that much   
   > smaller than many other designs of the period.   
   >   
   > This is from my lecture notes and also a couple of pints while at   
   > Uni 25 years ago.  The lecturer for hardware design was none other   
   > than Steve Furber who co-designed and literally wrote the book on   
   > the thing.   
      
   That's about right - ARM1/ARM2 was designed specifically for the Archimedes,   
   and various design decisions that remain in Aarch32 are because of specific   
   constraints on that platform.  For example ARM2 had no cache and was   
   designed to make best use of FPM DRAM.  Every instruction took two cycles   
   except some where sequential memory accesses could be completed in a single   
   cycle - hence LDM/STM instructions.   
      
   Matt Evans (another of Steve's former students) did a good talk on this at   
   CCC a few years ago:   
   https://media.ccc.de/v/36c3-10703-the_ultimate_acorn_archimedes_talk   
      
   Theo   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)   

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