From: usenet@andyburns.uk   
      
   Single Stage to Orbit wrote:   
      
   > Most interestingly enough, you can actually boot up with one RISCV core   
   > and one ARM core, two RISCV cores or both ARM cores. Mixed processor   
   > cores that'll be fun to see what we can do with that.   
      
   That's what I meant by "perm any 2 from 4", fun with the inter-CPU   
   doorbells ...   
      
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