From: lars@beagle-ears.com   
      
   On 2026-02-04, The Natural Philosopher  wrote:   
   > If you remember I had constricted a bridge from wifi to ethernet to act   
   > as a bridged access point. On a PI 4B as a test platform   
   >   
   > The problem was that whilst the bridge was reasonably OK accessing my   
   > LAN, up to 90% packet loss was experienced when accessing the internet   
   > via my edge router.   
   >   
   > Two further points have been established but the exact reason for the   
   > behaviour still remains a mystery   
   >   
   > 1/. A friend with a Pi 5 attempted to duplicate the setup, could not get   
   > it to work and instead used the Network Manager  GUI to set up  a   
   > (routed?) access point which worked ok. It turns out that you cannot use   
   > the GUI tool to set up a bridge at all. Only nmcli.   
   >   
   > 2/. After a long time with traceroutes and pings I realised that this   
   > particular machine was the *only one wired directly to the router via a   
   > single gigabit Ethernet cable*. Everything else went via an ancient   
   > 100Mbps switch that I inherited from an office clearout. In a rash of   
   > 'well I tried everything else' I unplugged the Pi from the Gigabit   
   > router socket  and put it into the 100Mbps switch and bingo!... Pretty   
   > decent internet performance. Yes extremely long transfers sometimes   
   > fail, but its very useable   
   >   
   > What I cannot for the life of me understand is *why*  this worked. The   
   > same [Gigabit] link was involved in both local and Internet access.  The   
   > only difference being that local access ALSO went through a 100Mbps switch.   
   >   
   > If anyone can shed light on this I would appreciate it.   
   >   
   > If it matters, the router is a Draytek Vigor2762Vac running PPPoE via an   
   > Openrach ONT to an optical fibre for Internet and thence to the ISP.   
      
   The link-level connection involves a negotiation handshake to find   
   compatible parameters. You may read up on MII (Media Independent   
   Interface). When the state machines in the MII part of the MAC block in   
   the Ethernet part of your SoC chip encounters an MII state machine it   
   has not seen before, there may be timing dependent glitches.   
   One of our customers has an installation on a remote island where   
   the link between a microprocessor in his seismic gear connected via an   
   ethernet switch to our radio locks up every 6 to 12 months and needs a   
   remote-triggered power cycle to reset. We suggested he try another   
   switch next time he can get a service tech to the island.   
      
   It is also possible that a port data rate of a Gigabit may occasionally   
   cause bus contention on some internal data bus in the PI triggering   
   a bus error, while 100Mbps avoids that contention. I have seen such   
   bus contention cause glitches in memory controllers in a few systems   
   over my career.   
      
   --   
   Lars Poulsen - an old geek in Santa Barbara, California   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)