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 Message 21173 
 Lawrence D'Oliveiro to Brian Gregory 
 Re: OT: horrible 8086 segmentation 
 23 Dec 24 22:55:52 
 
INTL 3:770/1 3:770/3
REPLYADDR ldo@nz.invalid
REPLYTO 3:770/3.0 UUCP
MSGID:  3897d3ea
REPLY:  605719b0
PID: SoupGate-Win32 v1.05
On Mon, 23 Dec 2024 03:26:11 +0000, Brian Gregory wrote:

> On 18/12/2024 06:22, Lawrence D'Oliveiro wrote:
>
>> On Sun, 01 Dec 2024 15:11:05 +0000, Richard Kettlewell wrote:
>>
>>> The Natural Philosopher  writes:
>>>
>>>> I also remember a zilog Z8000?
>>>
>>> Yes, although also with a segmented memory model.
>>
>> Its segmentation scheme made Intel x86 look good.
>
> Not that unusual. Compare to some of the Microchip PICs. Some have
> really bizarre bank switching arrangements and so on.

I think the Apple II RAM expansion card worked by switching to a different
bank (48K each?) every time a particular control register byte was
written. You couldn’t just write a bank number: instead, you had to repeat
the write N number of times, and I guess remember where you started from,
to get to the right bank.

But this was because the CPU itself only supported 16-bit addressing. What
was Zilog’s excuse?

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