From: info@turneraudio.com.au   
      
   Previously, I described my 3 transistor amplitude control circuit, then I   
   said.....   
      
   """This is all very well, and a fabulous plan and while there wasn't any   
   oscillator amp hooked up, the experiment showed it might work, but   
   unfortunately, time constants got me yet again when trying to implement a   
   circuit with long time constants into    
   another amp circuit ( the oscillator amp ) with very high open loop gain, even   
   at near DC.    
   The result was that the Vo slowly waved up and down like very slow amplitude   
   modulation because the DC servo circuit was acting as a LF oscilator to vary   
   the lamp resistance.    
   Back to the drawing board. I doubt if any simulation program would tell me it   
   won't work before I built it because I doubt anyobe would know how to enter in   
   so many interactive variables.    
      
   But at least I knew the oscillator works with a j-fet Vo reg, except for the   
   highish THD. I will reserach a little more, before returing to the j-fet idea.    
      
   Sorry to bore you all to tears. Its OK, but wenya tryta build sumping good,   
   with high aims in mind, then a special Law of Life applies :- COWPAT = 1 / N   
   squared, where COWPAT = Chance Of Working Perfectly Any Time and N is the   
   number of things you didn't    
   know might stop it working, or what you didn't know, or you dropped a spanner,   
   or the dog ate your data notebooks :-)    
   Patrick Turner"""   
      
   Now today I tried a few more mods to time constants around 3 bjts, ie, adding   
   larger coupling C, and finally I got it stable at 1kHz, and I measured THD =   
   0.015%, not bad. But if I switched anything, the Vo would dissapear and take   
   too much time to re-   
   appear at a different F.    
      
   So, I removed the 3 bjt Vo control circuit; I don't have a lifetime to spend   
   on a dodgy idea.    
      
   I assembled a j-fet circuit again, but this time added some shunt NFB between   
   drain and gate, just 2 x 10k plus a 220uF and slightly modded rectifier   
   circuit for getting the wanted -1Vdc gate bias.    
      
   The revised Vo reg circuit will appear at my website in coming days.   
      
   The shunt FB does not much change the j-fet MPF102 Rd which needs to be about   
   300r at normal op with about -1Vdc gate bias.    
   Everything became stable and not too critical and I could re-measure THD with   
   the fet Vo control. I got 0.014%, certainly good enough, and better than   
   nearly 2% without the local shunt FB at the fet.   
      
   I then built an complementary darlington pair emitter follower buffer output   
   stage to use between 1k0 output pot and output terminals. This lowered Ro to   
   55 ohms, so that HF content wasn't so easily shunted by cable C after the   
   output pot. I used PN100,    
   PN200 driving BD1390, BD140.    
      
   But THD rose to 0.09%, I suspect its the buffer., even though it has 15mAdc   
   idle current so 3.6Vrms can be put into 400r without the stage moving out of   
   class A. No crossover THD at HF.    
      
   The effect of the buffer after the attenuator and level pot gave a rather good   
   1MHz square wave with 104V/uS rise time, ie, the rise time was like 1/2 a   
   10MHz sine wave which is 10.4Vp-p, and time = 0.1uS.    
      
   So the old BWD 141 is now quite a decent unit. Switching F along a selected   
   band causes almost no V0 level bounce, and no long delays before settling and   
   like my other oscillators with switched F it works just fine.   
      
   Noise at the output with all attenuators turned to low was mainly stray RF   
   pick up because metal covers are not on yet, but level measured > 0.2mV. The   
   only thing in the signal path is the EF output buffer with its input shunted   
   to 0V,   
   so there isn't much noise.   
      
   Patrick Turner.   
      
   --- SoupGate-Win32 v1.05   
    * Origin: you cannot sedate... all the things you hate (1:229/2)