XPost: sci.electronics.design   
   From: erichpwagner@hotmail.com   
      
   On 16/04/2019 10:10, Piglet wrote:   
   > On 16/04/2019 09:41, Piglet wrote:   
   >> On 16/04/2019 09:27, Terry Pinnell wrote:   
   >>> default  wrote:   
   >>>   
   >>>> I'd isolate the signal from the input to the CMOS gate....use relays   
   >>>   
   >>> Although having some negative practical downsides (like discarding the   
   >>> case for a larger one) I might try that. I assume you simply mean taking   
   >>> the noise-prone input to an NPN transistor driving a relay which then   
   >>> switches +V (or a fraction of it) to the original relay driver? A sort   
   >>> of mechanical, slower echo of the original?   
   >>>   
   >>   
   >> Don't use a relay to directly clock the 4013 because the relay contacts   
   >> will have bounce and cause multiple triggers so you'd be no better off   
   >> as you'd need to clean up the relay contact bounce.   
   >>   
   >> I think the suggestion was to use relays throughout, as in:   
   >>   
   >>    
   >>   
   >> piglet   
   >>   
   >   
   > If rebuilding from scratch is too painful an idea then you might be able   
   > to press the other half of the 4013 into making a crude level triggered   
   > monostable to clean up the trigger for the existing toggle. Here is a   
   > sketch:   
   >   
   >    
   >   
   > piglet   
   >   
      
   As the poster "default" noted the clock cleanup doesn't have to be a   
   monostable. Leads to further simplification:   
      
      
      
   The CP and D inputs can be tied to Vdd instead of Vss if that makes your   
   layout easier.   
      
   piglet   
      
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