From: bill.sloman@ieee.org   
      
   On 1/12/2025 2:32 am, john larkin wrote:   
   > On Mon, 1 Dec 2025 00:28:19 +1100, Bill Sloman    
   > wrote:   
   >   
   >> On 30/11/2025 4:56 pm, john larkin wrote:   
   >>> On Sat, 29 Nov 2025 11:17:12 -0800, Joerg    
   >>> wrote:   
   >>>   
   >>>> On 11/29/25 3:38 AM, Bill Sloman wrote:   
   >>>>> On 29/11/2025 8:56 am, Joerg wrote:   
   >>>>>> On 11/28/25 1:32 PM, Joe Gwinn wrote:   
   >>>>>>> On Fri, 28 Nov 2025 12:52:07 -0800, Joerg    
   >>>>>>> wrote:   
   >>>>>>>   
   >>>>>>>> On 11/28/25 12:45 PM, Joerg wrote:   
   >>>>>>   
   >>>>>> [...]   
   >>>>>>   
   >>>>>>>>> To the surprise of my clients it's the contrary. The most   
   >>>>>>>>> client-shocking redesign was an auto-align circuit for ganged   
   >>>>>>>>> ADC-channels. High speed, high phase accuracy and all that. They   
   >>>>>>>>> had an   
   >>>>>>>>> elaborate time domain method with a fat DSP, lots of code and very   
   >>>>>>>>   
   >>>>>>>>     I meant they used a frequency domain method.   
   >>>>>>>>   
   >>>>>>>>> expensive chips used as programmable delay chips. The NRE alone had   
   >>>>>>>>> been   
   >>>>>>>>> humongous. It never reliably converged so the system hung a lot. I   
   >>>>>>>>> suggested to ditch all that and use time domain. This caused an   
   uproar   
   >>>>>>>>> because I had rocked the boat a lot and usually consultants aren't   
   >>>>>>>>> supposed to do that. "I don't think this can possibly work", "It   
   won't   
   >>>>>>>>> deliver the accuracy", "It won't converge either" and all that.   
   >>>>>>>>>   
   >>>>>>>>> Yet the boss let me do it. In the end the whole thing dropped from   
   >>>>>>>>> three-digit dollars in HW to under 10 bucks. Instead of expensive   
   >>>>>>>>> discrete-step time delay chips I used inductors, caps and varicap   
   >>>>>>>>> diodes   
   >>>>>>>>> for almost infinite granularity. The DSP became unemployed because   
   the   
   >>>>>>>>> connected PC could easily handle the computations. It converged in   
   >>>>>>>>> less   
   >>>>>>>>> than a second, always. The NRE was low because it took less than two   
   >>>>>>>>> weeks of my time and less than a day for the programmer, and we   
   didn't   
   >>>>>>>>> need an expensive DSP programmer.   
   >>>>>>>   
   >>>>>>> Embarrassing.  Were any of the customers design team later   
   >>>>>>> defenstrated?   
   >>>>>>   
   >>>>>> No, they were pretty good. It's the usual phenomenon where, in an old   
   >>>>>> German saying, you can't see the forest because of all the trees.   
   >>>>>   
   >>>>> Brainstorming is designed to get around that to some extent, but if you   
   >>>>> aren't used to thinking outside the box it's difficult to step back far   
   >>>>> enough to get outside the box.   
   >>>>>   
   >>>>   
   >>>> My experience with brainstorm sessions is not good. The results are   
   >>>> often encouraging but then hardly anything of it gets documented and   
   >>>> typically none of it is implemented. All I need is a large whiteboard   
   >>>> or a large piece of paper. Plus coffee or mate (having a mate right now).   
   >>   
   >> It's a desperation measure to break up some kind of intellectual log-jam.   
   >>   
   >> It isn't going to work all that often. Documenting it is a chore, but it   
   >> does need to be done   
   >>   
   >>> Brainstorming is great, done right.   
   >>>   
   >>> We sign and date our whiteboard scribbles and photograph them and   
   >>> stash the pics in the project notes folder.   
   >>   
   >> Great for people who like visualisation.   
   >   
   > Or are literate.   
      
   The illiterate can still look at pictures. Being able to write doesn't   
   guarantee that you can organise your ideas into a chunk of text that   
   other people will understand in the way that you want them to.   
   Whiteboard scribbles aren't structured text.   
      
   >>> Our ideas are certainly implemented.   
   >>>   
   >>> We had a great one last week. I designed a relay/circuit breaker   
   >>> module and we came up with a nice way to let user's gang breakers.   
   >>   
   >> By which you mean what? Tripping one circuit breaker trips associated   
   >> circuit breakers? And the user can set up groups, all of which trip at   
   >> the same time?   
   >   
   > Yes. Just like pinning a group of real breaker levers together.   
   >   
   > The brainstorm session came up with a nice way to do it in the FPGA   
   > without elaborate state machines, and more important, a way to design   
   > a user interface that's easy to understand and won't provoke a flood   
   > of phone calls for support.   
      
   A user interface which you hope will be easy to understand. The only way   
   to be confident about that is find a bunch of naive users and test it on   
   them. Engineers aren't naive users.   
      
      
      
   --- SoupGate-Win32 v1.05   
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