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|    sci.electronics.design    |    Electronic circuit design    |    143,102 messages    |
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|    Message 142,264 of 143,102    |
|    john larkin to jeroen@nospam.please    |
|    Re: mounting a pot core (2/2)    |
|    24 Jan 26 07:54:13    |
      [continued from previous message]              >WINDOW 3 32 56 VTop 2       >SYMATTR InstName R2       >SYMATTR Value 50       >TEXT 296 408 Left 2 !.model myswitch SW(Ron=10m roff=1G Vt=0.5)       >TEXT 96 48 Left 2 !.tran 50n       >       >              That's it. The timing of the OUTP and OUTM nodes is interesting,       skewed by the line delay. That makes the differential output goofy.              That effect ceates a mess of tradeoffs.              Adding inductance makes it worse. Nonlinear L, even worse.                     John Larkin       Highland Tech Glen Canyon Design Center       Lunatic Fringe Electronics              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
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