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|    sci.optics    |    Discussion relating to the science of op    |    12,750 messages    |
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|    Message 12,664 of 12,750    |
|    HoloLab to All    |
|    Re: fringe lock system    |
|    20 Mar 23 14:03:01    |
      From: jeedom74000@gmail.com              > The capacitance of your piezo stack is probably in the 10-nf range--it's       > worth measuring that, because R_out * C_piezo is probably the dominant       > pole in the loop right now.       >       > If you need any help with frequency-compensating the loop, ask.       > Cheers              Hmm, you've lost me there (that's how little I know about electronics!).       What do you mean by "probably the dominant pole in the loop right now"?       I have increased the capacitance on the output low pass and I can now increase       the gain without oscillating.       Now I have increased the output gain by "a lot" but somehow it does not seem       to improve much; I might be missing something              --- SoupGate-Win32 v1.05        * Origin: you cannot sedate... all the things you hate (1:229/2)    |
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